The present invention generally relates to semiconductor devices and more particularly to a CMOS imaging device.
Today, CMOS imaging devices are used widely in portable telephone handsets equipped with camera or digital still cameras. A CMOS imaging device has a simple construction as compared with CCD imaging devices and has an advantageous feature of being constructed with low cost.
FIG. 1 shows the construction of such a CMOS imaging device 100.
Referring to FIG. 1, the CMOS imaging device 100 has a light receiving region 101A in which a large number of CMOS pixel elements 10 are arranged in a row and column formation, and a row selection circuit 101B and a signal reading circuit 101C cooperate with each CMOS pixel element 10 in the light receiving region 101A. Here, it should be noted that the row selection circuit 101B selects a transfer control line TG, a reset control line RST and further a selection control line SEL of a desired CMOS pixel element 10, while the signal reading circuit 101C supplies a reset voltage to a reset voltage line VR and reads out a signal voltage output from the pixel to signal a reading line SIG.
FIG. 2 shows the construction of a CMOS device 10 for one pixel used with the CMOS imaging device 100 of FIG. 1.
Referring to FIG. 2, a photodiode 10D is connected to a power supply terminal 10A, which in turn is connected to the reset voltage line VR for receiving a predetermined reset voltage, via a reset transistor 10B controlled by a reset signal on the reset control line RST and a transfer gate transistor 10C controlled by a transfer control signal on the transfer control line TG, in a manner that the photodiode 10D is provided with reverse biasing, and thus, the photoelectrons formed by optical irradiation in the photodiode 10D are accumulated in a floating diffusion region FD formed in an intermediate node between the reset transistor 10B and the transfer gate transistor 10C through the transfer gate transistor 10C and is converted to voltage therein.
Thus, with the construction of FIG. 2, the voltage signal formed in the floating diffusion region FD is read by the reading transistor 10F driven by the supply voltage from the power supply terminal 10A, wherein it should be noted that the reading transistor 10F forms a source follower circuit. The output of the reading transistor 10F is then provided to the signal line SIG by the select transistor 10S. The select transistor 10S is connected to the reading transistor in series and controlled by the selection control signal on the selection control line SEL.
Meanwhile, it is also possible to use a CMOS element 10′ of the construction in which the reading transistor 10F and the selection transistor 10S are interchanged as shown in FIG. 3 for the CMOS pixel element operating identically to the CMOS pixel element 10 of FIG. 2.
FIG. 4 is a diagram explaining the operation of the CMOS pixel element 10 or 10′ of FIG. 2 or FIG. 3.
Referring to FIG. 4, the selection control signal on the selection control line SEL goes up at first, and a column that includes the desired CMOS pixel element is selected by the conduction of the select transistor 10S.
Next, the reset signal on the reset control line RST goes up, and as a result of the conduction of the reset transistor 10B, the floating diffusion region FD is charged to a reset state. In this stage, it should be noted that the transfer transistor 10C is turned off. In response to the rising of the reset signal, there occurs rising of electric potential in the floating diffusion region FD, while the effect of this rising of the electric potential of the floating diffusion region FD appears also on signal line SIG via the reading transistor 10F and the select transistor 10S, which is in a conduction state. This rising of the signal line SIG, however, is not used for signal reading.
Next, after falling of the reset signal, the transfer gate transistor 10C maintains the turn-off state and the electric potential of the floating diffusion region FD is read out on the signal line SIG by the reading transistor 10F. With this, reading of noise level is achieved.
Further, after reading of the noise level, there occurs rising of the transfer control signal on the transfer control line TG, and the electric charges formed in the photodiode 10D are transferred to the floating diffusion region 10F through the transfer gate transistor 10C. Thereby, the electric potential of the floating diffusion region 10F is changed by ΔV=Q/C by the electric charges of the amount Q thus transferred, wherein C is the capacitance of the floating diffusion region FD. Thus, the electric potential of the floating diffusion region FD is read by transistor 10F after the transfer control signal has fallen down and is provided to the signal line SIG through the select transistor 10S.